Thread scheduling mechanisms for processor resource power management
US7111182B2 · kind B2 · utility
10Cited by
7References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 29, 2003 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Dec 31, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A real-time operating system runs on a processor and dynamically manages the power state of individual circuits or resources with the processor. Thus, if a particular circuit is not needed, power to that circuit can be disabled. If a circuit is shut down, any configuration information or other type of data can be saved before powering off the circuit. Power can be re-enabled to the circuit on a responsive or predictive basis and the configuration information and/or data (collectively referred to as “state” information) can be reloaded into the circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.