Configurable hardware scheduler calendar search algorithm
US7113517B2 · kind B2 · utility
3Cited by
17References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 27, 2001 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Jul 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3018
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Apparatus and method that schedules movement of packets within network devices, such as network processors, includes a calendar using a sectored hierarchical routine to identify the next packet to be moved from one of a plurality of flow queues. The segmented hierarchical routine allows searching to begin from any starting point identified by a current pointer CP in each segment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.