Circuits and methods for reducing pin count in multiple-mode integrated circuit devices
US7113907B2 · kind B2 · utility
5Cited by
4References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 17, 2003 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Nov 8, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2020/10583
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of controlling a terminal of an integrated circuit includes determining a frequency ratio between a frequency of a signal and a frequency of another signal received by an integrated circuit. A selected signal appearing at a selected terminal of the integrated circuit is selectively interpreted in accordance with an operating mode when the frequency ratio is below a selected value and in accordance with another operating mode when the frequency of the signal is above a selected value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.