System for reduced power consumption by monitoring instruction buffer and method thereof
US7114086B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 27, 2002 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Dec 5, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method are provided for reducing power consumption within a video processing portion of a system. Activity associated with an instruction buffer is monitored to determine whether power consumption modes can be initiated within a system. If a number of pending instructions within an instruction buffer is greater than a particular threshold value, a normal mode of operation is initiated. If the number of pending instructions is less than the threshold value, the system is put in a reduced mode of operation. In the reduced mode of operation, processing is reduced to lower power consumption within the system. Accordingly, power consumption is altered to match a level of activity within the instruction buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.