Stress tolerant high voltage back-to-back switch
US7116151B2 · kind B2 · utility
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2References
22Claims
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Key dates
| Filing date | Jun 30, 2004 |
| Grant date | Oct 3, 2006 |
| Priority date | — |
| Expiry date | Oct 3, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09441
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses associated with stepping down a high voltage in a high voltage switch. An additional transistor may be coupled to a switching transistor, and the additional transistor biased to a voltage level in between the high voltage to be switched and a switch reference voltage. When the switch is off, the high voltage may thus be spread across multiple devices to prevent a voltage from the gate to the drain to exceed a threshold associated with gate-aided breakdown of the drain-to-substrate channel-side pn-junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.