Method and apparatus for decoding a bit sequence

US7116732B2 · kind B2 · utility

Assignee

• ALCATEL · FR

Inventors

• Alexander Worm · Brussels, BE
• Heiko Michel · Stuttgart, DE
• Norbert Wehn · Queidersbach, DE

Key dates

• Filing date: Jun 21, 2002
• Grant date: Oct 3, 2006
• Expiry date: Jul 21, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04L1/0066
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A method and apparatus are disclosed for decoding according to a Log-MAP algorithm, a bit sequence encoded by a convolutional encoder and received through a noisy channel. A digital signal processor (DSP) for performing the decoding is provided with an extended core possessing a transition metric calculation unit (153) for calculating transition metric values of the encoder trellis for output to a memory store (101,102) of the DSP, and for output to a unit (154) for performing a Log-MAP add-compare-select operation. The Log-MAP add-compare-select unit (154) calculates updated path metric values of the encoder trellis for storage in a memory store (101,102) of the DSP, and for input to a Log-Likelihood Ratio calculating unit (155). The Log-Likelihood Ratio calculating unit (155) are each controlled by the program control unit (104) of the DSP, and communicate with the data memories (101, 102) of the DSP, via data lines (150, 151, 152).