Clock recovery circuit and receiver circuit for improving the error rate of signal reproduction
US7116744B2 · kind B2 · utility
32Cited by
5References
56Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2001 |
| Grant date | Oct 3, 2006 |
| Priority date | — |
| Expiry date | Dec 7, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock recovery circuit has a boundary detection/discrimination circuit to detect and discriminate a boundary in an input signal in accordance with a first signal. The clock recovery circuit performs clock recovery by controlling the timing of the first signal in accordance with the detected boundary, wherein boundary detection timing in the boundary detection/discrimination circuit is varied by controlling the first signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.