Transmitter circuit and method for modulation distortion compensation
US7116951B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2003 |
| Grant date | Oct 3, 2006 |
| Priority date | — |
| Expiry date | Mar 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/0441
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transmitter circuit (200, 400, 510) and method reduces amplitude modulation distortion in an amplifier (210). The transmitter circuit (200, 400, 510) includes a power control error data generator (230), a feedforward predistortion data generator (240), feedforward adder logic (250) and the amplifier (210). The power control error data generator (230) receives amplitude modulation data (252) and an RF coupled output signal (254) and, in response, produces power control error data (256). The feedforward predistortion data generator (240) receives the amplitude modulation data (252) and, in response, produces feedforward predistortion data (258). The feedforward adder logic (250) receives the power control error data (256) and the feedforward predistortion data (258) and, in response, produces power control data (260). The amplifier (210) receives the power control data (260) and an RF input signal (261) and, in response, produces an RF output signal (262), such that the power control data (260) reduces amplitude modulation distortion in the RF output signal (262).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.