Control signal generation circuit and data transmission circuit having the same
US7117381B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 2004 |
| Grant date | Oct 3, 2006 |
| Priority date | — |
| Expiry date | Mar 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data transmission circuit includes a control signal generation circuit, a write state machine, a conversion circuit, a read state machine, and a selection circuit. The control signal generation circuit receives a strobe signal and a clock signal in response to an enable signal, generates a write control signal that is activated in response to a rising edge of the strobe signal, and generates a read control signal that is activated in response to a first rising or falling edge of the clock signal after the write control signal is activated. The write state machine is activated in response to the write control signal, changes its internal state in synchronization with the strobe signal, and sequentially outputs input control signals in response to the changed internal state. The conversion circuit converts serial data to parallel data in response to the input control signal sequentially output from the write state machine and latches the parallel data. The read state machine is activated in response to the read control signal, changes its internal state in synchronization with the clock signal, and sequentially outputs output control signals in response to the changed internal stat…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.