Production method of semiconductor device
US7119007B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 2005 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Apr 4, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/942
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The method includes forming on an underlayer wiring a first insulating film, a second insulating, and first mask forming layer; forming a first resist mask having an inverted pattern of wiring Wenches for the upper wiring; etching the first mask forming layer through the first resist mask, thereby forming in the first mask forming layer a concave part conforming to the inverted pattern of wiring tenches for the upper wiring, forming on the first mask forming layer a second mask forming layer, thereby filling the concave part with the second mask forming layer; selectively removing the second mask forming layer on the region in which the wiring trench is formed, thereby forming the second mask having the wiring trench pattern; forming on the first mask forming layer a second resist mask having an opening pattern of the via holes; etching the first mask forming layer and the second insulating film through the second resist mask, thereby forming the via holes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.