Isotopically pure silicon-on-insulator wafers and method of making same
US7119400B2 · kind B2 · utility
19Cited by
12References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 24, 2003 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Dec 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/8581
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A semiconductor wafer structure having a device layer, an insulating layer, and a substrate which is capable of supporting increased semiconductor device densities or increased semiconductor device power. One or more of the layers includes an isotopically enriched semiconductor material having a higher thermal conductivity than semiconductor material having naturally occurring isotopic ratios. The wafer structure may be formed by various techniques, such as wafer bonding, and deposition techniques.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.