On-chip calibrated source termination for voltage mode driver and method of calibration thereof
US7119611B2 · kind B2 · utility
7Cited by
5References
81Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 11, 2003 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Apr 11, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45726
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
On-chip calibrated source termination for voltage mode driver. An amplifier is disclosed having an internal amplifier with a first output and a second output, the first output interfaced to a non-inverting input through an interface. The second output is coupled to the first output through a series resistance element. The output impedance of the amplifier is determined by the ratio of the current drive of the first and second outputs. The voltage on said second output being a function of said interface and the current input to said internal amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.