Differential signal squelch detection circuit and method
US7120408B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 31, 2003 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Sep 12, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0292
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An electrical circuit detects a “squelch,” or “out-of-band,” state of a differential signal pair having a positive (“p”) signal line and a negative (“n”) signal line. In one embodiment of the invention, a first and a second comparator each have positive inputs driven by the positive and negative signal lines, respectively. The negative inputs of the comparators are driven by the outputs of separate digital-to-analog converters (DACs) which are set to a lower squelch threshold voltage. The outputs of the comparators then drive the inputs of a logical AND gate, the output of which indicates the current squelch state of the differential signal pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.