Patent · US Expired

Cache mechanism

US7120749B2 · kind B2 · utility

1Cited by

2References

23Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Ryan Rakvic · Palo Alto, US
Youfeng Wu · Palo Alto, US
Bryan Black · Austin, US
John Shen · Tainan, TW

Key dates

Filing date	Mar 18, 2004
Grant date	Oct 10, 2006
Priority date	—
Expiry date	Jan 28, 2025

Classification

Technology area (CPC G)Physics
CPC primaryG06F12/0888
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

According to one embodiment a system is disclosed. The system includes a central processing unit (CPU), a first cache memory coupled to the CPU to store only data for vital loads that are to be immediately processed at the CPU, a second cache memory coupled to the CPU to store data for semi-vital loads to be processed at the CPU, and a third cache memory coupled to the CPU, the first cache memory and the second cache memory to store non-vital loads to be processed at the CPU.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.