Multi-port memory based on DRAM core
US7120761B2 · kind B2 · utility
25Cited by
17References
41Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2002 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Sep 27, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/108
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a plurality of N external ports, each of which receives commands, and an internal circuit which performs at least N access operations during a minimum interval of the commands that are input into one of the external ports.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.