Information processing apparatus and method, as well as program
US7120808B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2003 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Dec 24, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Performing power saving control which can be inherited and standardized easily, and which keeps power devices from having to become larger is made possible. A current In flowing through an electrical path is detected as a voltage Vs by a current detection section, and is outputted as a voltage Vout by an amplifying section. When a level corresponding to the voltage Vout exceeds a limit level, a power limit detection section outputs a power limit detection signal. When a controller receives the power limit detection signal via a detection signal holding section, the controller outputs a throttle control command signal. When a chip set receives the throttle control command signal, the chip set initiates throttle control that lowers the clock frequency of a CPU. The present invention may be applied to laptop personal computers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.