Chip and multi-chip semiconductor device using thereof and method for manufacturing same
US7122912B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 25, 2005 |
| Grant date | Oct 17, 2006 |
| Priority date | — |
| Expiry date | Jan 25, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/975
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The chip for the multi-chip semiconductor device having the markings for alignment formed on the front surface and/or the back surface of the chip only by the processing from the front surface of the chip (photolithography, etch) and the method for manufacturing same are presented, without adding any dedicated process step to the formation process for the marking for alignment. In the chip for the multi-chip semiconductor device having two or more electroconductive through plug in one chip for the multi-chip semiconductor device, one or more electroconductive through plugs are employed for the marking for alignment, and the chip is configured to allow identification of the marking for alignment on the front surface and/or the back surface of the chip for the multi-chip semiconductor device. Then, an insulating film is provided on the front surface and/or the back surface of the electrically conducting through plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.