Semiconductor integrated circuit
US7123093B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 5, 2004 |
| Grant date | Oct 17, 2006 |
| Priority date | — |
| Expiry date | Sep 2, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45183
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The output of a differential amplifier circuit group (PA) that amplifies signals inputted to input PINs is connected to a final-stage differential amplifier circuit (PAn). The output of the differential amplifier circuit (PAn) is connected to a detection (DET) circuit. A detect signal sent from the DET circuit is outputted to the (−) side input of a comparator. A bias signal (BP) outputted from a bias circuit is inputted to the base of a PMOS transistor of a source follower circuit. An output signal (SFOUT) outputted from a source terminal thereof is inputted to the (+) side input of the comparator. A result of comparison between the bias signal (BP) and the output signal (SFOUT) is outputted from the comparator as an output signal (COMPOUT).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.