Systems and method for automatic quadrature phase imbalance compensation using a delay locked loop
US7123103B1 · kind B1 · utility
7Cited by
7References
20Claims
0Family size
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Key dates
| Filing date | Mar 31, 2005 |
| Grant date | Oct 17, 2006 |
| Priority date | — |
| Expiry date | Mar 31, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/085
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An automatic quadrature phase compensation system comprises an on-chip analog phase sense circuit capable of detecting small differences in quadrature phase error and providing a corresponding DC voltage, a voltage-controlled or programmable phase delay circuit to implement quadrature phase error correction, and a feedback system or compensation engine used to process the sensed error voltage and apply a corresponding correction signal to the adjustable phase delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.