Phase shifter and multibit phase shifter
US7123116B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2002 |
| Grant date | Oct 17, 2006 |
| Priority date | — |
| Expiry date | Mar 26, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase shifter includes an FET 2a having its drain electrode connected to an input/output terminal 1a; and FET 2b having its drain electrode connected to the source electrode of the FET 2a and its source electrode connected to an input/output terminal 1b; and FET 2c having its drain electrode connected to the source electrode of the FET 2a; and an inductor 3a having its first terminal connected to the source electrode of the FET 2c and its second terminal connected to a ground. It can reduce the insertion loss by narrowing the gate width of the FET 2a, and carries out the phase shift of a high-frequency signal with suppressing the reflection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.