Data storage system having cache memory manager with packet switching network
US7124245B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2003 |
| Grant date | Oct 17, 2006 |
| Priority date | — |
| Expiry date | Sep 30, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0866
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system interface having: a plurality of front end directors adapted for coupling to a host computer/server; a plurality of back end directors adapted for coupling to a bank of disk drives; a data transfer section having cache memory; a cache memory manager; and, a message network. The cache memory is coupled to the plurality of front end and back end directors. The messaging network operates independently of the data transfer section and is coupled to the plurality of front end and back end. The front end and back end directors control data transfer between the host computer/server and the bank of disk drives in response to messages passing between the front end directors and the back end directors through the messaging network to facilitate data transfer between host computer/server and the bank of disk drives. The data passes through the cache memory in the data transfer section as such data passes between the host computer and the bank of disk drives. The system includes a cache memory manager having therein a memory for storing a map maintaining a relationship between data stored in the cache memory and data stored in the disk drives. The cache memory manager provides an inte…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.