Memory controller including data clearing module
US7124269B2 · kind B2 · utility
6Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2004 |
| Grant date | Oct 17, 2006 |
| Priority date | — |
| Expiry date | Jan 19, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30043
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes a processor, and a memory controller electrically connected to the processor and the memory for controlling the accessing operations of the memory. The method includes the processor generating a predetermined logic value and delivering the predetermined logic value to the memory controller, and the memory controller repeatedly overwriting data stored in the plurality of memory units by the predetermined logic value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.