Execution control apparatus of data driven information processor for instruction inputs
US7124280B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2001 |
| Grant date | Oct 17, 2006 |
| Priority date | — |
| Expiry date | Nov 22, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4494
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An execution control apparatus of a data driven information processor includes: an instruction decoder that outputs the a number of inputs of an instruction; a waiting data storage region that stores N (N≧2) waiting data and respective data valid flags in one address; a constant storage that stores constants and a constant valid flag; a constant readout unit that reads out a constant and a constant valid flag from the constant storage with the node number of an input packet as the address; a unit that calculates a hash address and selects a process for data waiting depending upon a combination of a data valid flag, a constant valid flag, and the number of instuction inputs; and a unit that performs a waiting process in response to a select signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.