S-parameter power plane probe coupon
US7126155B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2004 |
| Grant date | Oct 24, 2006 |
| Priority date | — |
| Expiry date | Dec 31, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10719
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A test point on a printed circuit board includes at least one connection to the power plane having first and second interconnected pads disposed on opposing sides of the power plane, and at least one connection to the ground plane having third and fourth interconnected pads disposed on opposing sides of the ground plane. The first and second interconnected pads provide parallel paths to the power plane, thereby reducing the impedance presented to test equipment. Similarly, The third and fourth interconnected pads provide parallel paths to the ground plane. The test point may be implemented with multiple ground plane connections disposed symmetrically around a power plane connection. For example, first and second ground plane connections may be disposed on opposing sides of a power plane connection to provide shielding to the power plane connection, thereby reducing the inductive loop associated with probe parasitics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.