Power on reset circuits
US7126391B1 · kind B1 · utility
6Cited by
23References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2004 |
| Grant date | Oct 24, 2006 |
| Priority date | — |
| Expiry date | Mar 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a power on reset circuit includes a main circuit and a translation circuit. The main circuit may be configured to receive an external signal and to generate an input signal that is indicative of a state of the external signal. The translation circuit may be configured to receive the input signal and provide a power on reset signal indicative of a brownout condition of the external signal. The external signal may be a relatively high voltage signal compared to the power on reset signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.