Scanning circuit and image display device
US7126597B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2002 |
| Grant date | Oct 24, 2006 |
| Priority date | — |
| Expiry date | Jul 30, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0223
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A scanning circuit and an image display device in which the influence of losses in a signal path to scanning wiring and a scanning signal output circuit can be reduced. By considering matrix drive in which one row is driven at a time and two or more of the rows are not simultaneously driven, the 480 rows are divided into six modules and one feedback circuit is provided in correspondence with each module to perform feedback control of the output buffers corresponding to 80 rows. An output from a switch is amplified by an operational amplifier and is input as a compensation signal to all the output buffers by an output voltage compensation circuit. Compensation for a voltage drop is made by using the compensation signal for an increase in voltage such that the apparent voltage drop due to the output current is limited to a small value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.