Reconfigurable VLIW processor
US7127590B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 2, 2000 |
| Grant date | Oct 24, 2006 |
| Priority date | — |
| Expiry date | Apr 29, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a computer processor (300) comprising a plurality of processing units (FU_n) and communication means (302) by which the plurality of processing units are interconnected. The communication means is dynamically configurable based on a computer program to be processed such that the processing units can selectively be arranged in at least first and second distinct configurations. The first distinct configuration (eg. FIG. 5) has a larger number of the processing units arranged in parallel than the second distinct configuration (eg. FIG. 6), and the second distinct configuration has a deeper pipeline depth than the first distinct configuration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.