Semiconductor integrated circuit and methods for protecting the circuit from reverse engineering
US7128271B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 15, 2004 |
| Grant date | Oct 31, 2006 |
| Priority date | — |
| Expiry date | Dec 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit having a reverse engineering protection part that can be easily implemented without additional circuitry or process using a method for protecting against reverse engineering of the semiconductor integrated circuit. The semiconductor integrated circuit includes a logic gate and a reverse engineering protection part. The reverse engineering protection part alters the apparent Boolean functions of a logic gate. Further, the reverse engineering protection part includes at least one PMOS transistor and at least one NMOS transistor. The PMOS and NMOS transistors are constructed to remain in a state of constant on or off irrespective of an input signal applied to their gates. The PMOS transistors and the NMOS transistors are included in transistors forming the logic gate. The PMOS transistors and the NMOS transistors that remain in a state of constant on or off are formed by implanting ions into their gate channels or blocking ion implantation into their gate channels during manufacturing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.