Reducing the migration of grain boundaries
US7129582B2 · kind B2 · utility
0Cited by
13References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2005 |
| Grant date | Oct 31, 2006 |
| Priority date | — |
| Expiry date | Jul 15, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/661
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device includes implanting a precipitate into a gate conductor of an at least partially formed semiconductor device. The gate conductor including a plurality of semiconductor grains. The boundaries of adjacent grains forming a dopant migration path. A plurality of precipitate regions are formed within the gate conductor. At least some of the precipitate regions located at a junction of at least two grains. The gate conductor of the at least partially formed semiconductor device is doped with a dopant. The dopant diffuses inwardly along the dopant migration path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.