Phase-locked loop circuit
US7129790B2 · kind B2 · utility
3Cited by
2References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 24, 2002 |
| Grant date | Oct 31, 2006 |
| Priority date | — |
| Expiry date | May 24, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/12
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase-locked loop circuit has an output amplifier (27) and a main feedback path from the output of the output amplifier (27). A subsidiary feedback path is provided directly from the output of the circuit's VCO (32). At the start of operation, the output amplifier (27) is disabled and the subsidiary feedback path is used until lock is achieved. Then the output amplifier (27) is enabled and the main feedback loop is used. This avoids spurious outputs from the outer amplifier while to loop locks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.