Addressing one MEA failure mode by controlling MEA catalyst layer overlap
US7132191B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2003 |
| Grant date | Nov 7, 2006 |
| Priority date | — |
| Expiry date | Apr 20, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/50
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method of addressing one MEA failure mode by controlling MEA catalyst layer overlap, and the apparatus formed thereby is disclosed. The present invention addresses a feature of membrane electrode assembly (MEA) architecture that is associated with field failures due to the loss of ionomer from the edges of the electrolyte. To address ionomer degradation, the present invention provides a MEA design in which the cathode catalyst edges are closer than the anode catalyst edges to the edges of the electrolyte.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.