Design for test for a high speed serial interface
US7132823B2 · kind B2 · utility
10Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 21, 2005 |
| Grant date | Nov 7, 2006 |
| Priority date | — |
| Expiry date | Jan 21, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/70
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Detecting a connection between two circuits utilizing a high-speed interface. Interface circuitry internal to a computing device performs an initialization process between two processors automatically to determine the state of the interface connection. Test circuitry retrieves the interface state from the interface circuitry. Neither the configuration process, the interface circuitry or the test circuitry require full functionality of an IC on which they reside in order to operate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.