Differential register slave structure
US7132870B2 · kind B2 · utility
5Cited by
9References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2004 |
| Grant date | Nov 7, 2006 |
| Priority date | — |
| Expiry date | Apr 2, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0372
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A differential register slave structure is presented. In one embodiment, a differential register includes a storage node (218, 318). The storage node (218, 318) stores and holds the differential values generated by the differential register. In one embodiment of the present invention, on power-up, when the state of various clocks (i.e., master, slave) in the differential register may be indeterminate, the storage node (218, 318) will discharge the differential values and the differential register will produce a differential output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.