Configuration for digital-analog conversion of high-frequency digital input signal into carrier-frequency analog output signal
US7132969B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2003 |
| Grant date | Nov 7, 2006 |
| Priority date | — |
| Expiry date | Jul 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/504
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A delay device has at least one first delay element and optional additional delay elements connected downstream from the first in a serially consecutive manner. The digital input signal is connected to an input of the first delay element and is connected to an input of a first D/A converter. The output of the first delay element is connected to an input of another D/A converter assigned thereto. The optional additional delay elements each have outputs connected to an input of another D/A converter assigned to the respective delay elements. All D/A converters are combined on the output side in a step-by-step manner so that output signals of all D/A converters form the analog output signal or the device. A specific coefficient is assigned to each D/A converter, and a specific delay time is assigned to each delay element for realizing a filter characteristic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.