Method and apparatus for efficient caching and rendering of large patterns in a small memory printer
US7133158B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2002 |
| Grant date | Nov 7, 2006 |
| Priority date | — |
| Expiry date | Jan 21, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K15/1828
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of performing a pattern fill operation of a pattern into a clipping region resolves the pattern into an intermediate format between a page description language and a page bit map. This intermediate format is cached. For each tiling of the pattern into the clipping region the pattern is clipped to the clipping region and rendered from the clipped intermediate format pattern into a corresponding location of a page bit map. The intermediate format of the pattern may be scan line runs and trapezoid fills. The intermediate format of the pattern may be paths and curves. The clipping of the pattern to the clipping region performs scan line conversion with polygon to polygon clipping or trapezoid/run array to trapezoid/run array clipping.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.