Embedded cell loopback method and system for testing in ATM networks
US7133367B2 · kind B2 · utility
1Cited by
8References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2005 |
| Grant date | Nov 7, 2006 |
| Priority date | — |
| Expiry date | Mar 1, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5628
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a method and apparatus for testing components in ATM networks utilizing loop-back based ATM layer testing. The method and apparatus utilize interfaces and identifier codes to send and loop-back test cells along portions of virtual channels to test the virtual channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.