Power supply rejection for pulse width modulated amplifiers and automatic gain control
US7135922B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 7, 2005 |
| Grant date | Nov 14, 2006 |
| Priority date | — |
| Expiry date | Jan 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/78
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit according to the present invention improves the power supply rejection ratio for a pulse width modulated digital amplifier and can be used as a compressor and/or limiter. The circuit preferably operates by using voltage level translation to vary the amplitude of a triangle wave in response to changes in power supply voltage prior to input of the wave into a comparator of the PWM device. Because the circuit operates to improve power supply rejection, little or no distortion is introduced into the signal when used as a compressor and/or limiter. Additionally, the circuit is optionally implemented in a Class D amplifier, and provides a lower cost of implementation than conventional designs in such implementations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.