Patent · US Expired

Electronic circuit arrangement for error-free analog/digital conversion of signals

US7135998B2 · kind B2 · utility

5Cited by

5References

14Claims

0Family size

Assignee

Continental Teves AG & Co. OHG · DE

Inventors

Wolfgang Fey · Niedernhausen, DE
Mario Engelmann · Rheinböllen, DE
Peter Oehler · Scheinfeld, DE

Key dates

Filing date	May 8, 2003
Grant date	Nov 14, 2006
Priority date	—
Expiry date	May 8, 2023

Classification

Technology area (CPC H)Electricity
CPC primaryH03M1/1225
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

The present invention relates to a circuit arrangement for the error-free analog-to-digital conversion of N analog input signals Ni in a plurality of digital output signals corresponding to the number N using exactly one analog-to-digital converter, wherein N>=1, wherein further N′ other redundancy inputs N′i are provided, and being fed to the said analog-to-digital converter, wherein the N and the N′ inputs are supplied to at least one analog multiplexer, and wherein the circuit arrangement has an error monitoring functionality, and each input signal Ni is counter to the corresponding redundancy signal N′i. The invention also relates to the use of the circuit arrangement in electronic motor vehicle control units with an anti-lock function.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.