Timing adjustment circuit and semiconductor device including the same
US7137022B2 · kind B2 · utility
13Cited by
3References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 23, 2003 |
| Grant date | Nov 14, 2006 |
| Priority date | — |
| Expiry date | Sep 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0816
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In order to compare a phase of an internal clock signal outputted from a clock driver with that of a data strobe signal from a data strobe output circuit driven by the internal clock signal, a selector is disposed to supply a data strobe signal instead of an external clock signal inputted into a phase comparison circuit. While the selector selects the data strobe signal, the selector, a replica circuit, and the phase comparison circuit operate as a phase advance/delay signal generation circuit to output a phase advance/delay signal indicating a timing deviation to an external output terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.