Electronic system for fixing power and signal semiconductor chips
US7138708B2 · kind B2 · utility
1Cited by
12References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2002 |
| Grant date | Nov 21, 2006 |
| Priority date | — |
| Expiry date | Oct 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic system having a sandwich design and including two carriers, each carrier having a printed circuit layer, the upper printed circuit layer being positioned on different planes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.