Gate pulse modulator
US7138990B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 27, 2004 |
| Grant date | Nov 21, 2006 |
| Priority date | — |
| Expiry date | Sep 27, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0247
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a gate pulse modulator. The inventive gate pulse modulator includes an input control unit receiving inputs from a gate high signal terminal, a clock signal terminal and a control signal terminal. In addition, the inventive gate pulse modulator includes an output control unit connected to the gate high signal terminal, the control signal terminal and an external driving signal terminal, wherein the output control unit supplies a base voltage to a gate driving unit when the control signal is low, and in the state where the control signal is high, the output control unit supplies a gate high voltage to the gate driving unit if the clock signal is high and supplies a driving voltage to the gate driving unit if the clock signal is low. In addition, the invention further comprises a time delay unit connected to a stage prior to the input control unit, so that the gate high voltage delayed for a predetermined length of time is supplied to the gate driving unit. Furthermore, a time constant adjusting resistor and a time constant adjusting capacitor are additionally connected so that the gate high voltage decreases not in a stepped pattern but in an exponential pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.