Bandwidth-efficient processing of video images
US7139002B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 27, 2003 |
| Grant date | Nov 21, 2006 |
| Priority date | — |
| Expiry date | Oct 27, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/0122
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A technique is described for performing multiple video processing tasks in a single operation, as opposed to serially. For instance, a technique is described for de-interlacing a principal video stream at the same time that at least one video sub-stream is combined with the principal video stream. Performing these tasks in a single call to a graphics processing unit, as opposed to staggered serial calls, reduces the bandwidth requirements of the processing operations. This, in turn, can enable a computing device to perform these multiple operations at full frame rate. In one implementation, different texturing units are respectively assigned to the principal video stream and the video sub-stream. The graphics processing unit interacts with these texturing units and associated memory locations substantially in parallel, thus providing the above-described bandwidth savings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.