Multiply execution unit for performing integer and XOR multiplication
US7139787B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2003 |
| Grant date | Nov 21, 2006 |
| Priority date | — |
| Expiry date | Jan 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/533
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiply execution unit that is operable to generate the integer product and the XOR product of a multiplicand and a multiplier. The multiply execution unit includes a summing circuit for summing a plurality of partial products. The partial products may be Booth encoded. The summing circuit can generate an integer sum of the plurality of partial products and can generate an XOR sum of the plurality of partial products. The summing circuit includes a first plurality of full adders. The first plurality of full adders each has three inputs, a carry output, and a sum output. The sum outputs of the first plurality of full adders are independent of the value of any carry output in the summing circuit. The summing circuit also includes a second plurality of full adders. The second plurality of full adders each has three inputs, a carry output, and a sum output. The XOR sum is dependent upon at least one of the sum outputs of the first plurality of full adders but is independent of the sum outputs of the second plurality of full adders. The integer sum is dependent upon the sum outputs of at least one of the first plurality of full adders and is also dependent on at least one of the sum …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.