Patent · US Expired

Modeling metastability in circuit design

US7139988B2 · kind B2 · utility

28Cited by
0References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 4, 2004
Grant dateNov 21, 2006
Priority date
Expiry dateFeb 1, 2025

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2119/12
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A computer program (100, 200) encoded in a computer-programmable medium, and for causing a computer to perform circuit design. The code causes the computer to perform a set of steps. The steps comprise describing a first set of circuitry and describing a second set of circuitry. The steps also comprise describing a digital signal for passing from the first set of circuitry to the second set of circuitry and detecting (230) transitions of the digital signal with respect to a timing constraint (240) of at least a portion of the second set of circuitry. Lastly, the steps comprise, responsive to detecting metastability with respect to timing of a transition of the digital signal relative to the timing constraint of at least a portion of the second set of circuitry, forcing (160) the digital signal to a random value and passing the random value to the second set of circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.