Method and apparatus for routing differential signals across a semiconductor chip
US7139993B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2004 |
| Grant date | Nov 21, 2006 |
| Priority date | — |
| Expiry date | Apr 6, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention provides an arrangement of differential pairs of wires that carry differential signals across a semiconductor chip. In this arrangement, differential pairs of wires are organized within a set of parallel tracks on the semiconductor chip. Furthermore, differential pairs of wires are organized to be non-adjacent within the tracks. This means that each true wire is separated from its corresponding complement wire by at least one intervening wire in the set of parallel tracks, thereby reducing coupling capacitance between corresponding true and complement wires. Moreover, this arrangement may include one or more twisting structures, wherein a twisting structure twists a differential pair of wires so that the corresponding true and complement wires are interchanged within the set of parallel tracks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.