Display device and manufacturing method of the same
US7141877B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2005 |
| Grant date | Nov 28, 2006 |
| Priority date | — |
| Expiry date | Apr 17, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention enhances the mounting accuracy of a drive circuit chip on a substrate thus realizing a display of high quality. Bumps (for example, gold bumps) on the drive circuit chip are used for alignment. Here, to enhance the recognition property of the alignment bumps, a plane shape of a conductive layer which is formed between a semiconductor substrate (Si substrate) of the drive circuit chip and the alignment bump is set to be included within a profile of a plane shape of the alignment bump. That is, by preventing the conductive layer from being observed in a periphery of the alignment bump, it is possible to prevent a photographed pattern of the bump taken by a camera or the like from be influenced by the conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.