Interface apparatus for integrated circuit testing
US7141993B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 2, 2002 |
| Grant date | Nov 28, 2006 |
| Priority date | — |
| Expiry date | Jul 2, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2886
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An apparatus and method for coupling a test head and probe card in an IC testing system incorporating patterned divider elements (24) disposed between rows of signal conductors (22) to provide matching characteristic impedance values along each row of signal conductors. The divider elements have a patterned conductive layer formed thereon that is electrically connected to ground, and a method for determining a useful pattern is provided. Test dividers (24) fabricated with openings of various size and shape are used to construct transmission lines. The impedance of these lines is measured, and the results are used to interpolate an appropriate opening size and shape to achieve a desired transmission line impedance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.