Offset cancellation in a switching amplifier
US7142047B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2004 |
| Grant date | Nov 28, 2006 |
| Priority date | — |
| Expiry date | Feb 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/331
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A switching circuit is described having an input stage having an input referred offset voltage associated therewith. An output stage has an output offset voltage associated therewith which is due at least in part to the input referred offset associated with the input stage. Offset cancellation circuitry is operable to cancel a portion of the input referred offset voltage before switching of the output stage is enabled thereby resulting in cancellation of the portion of the output offset voltage after switching of the output stage begins. The offset cancellation circuitry is further operable to release the input referred offset voltage after switching of the output stage begins thereby allowing the output offset voltage to drift.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.