Patent · US Expired

Amplifier arrangement

US7142059B2 · kind B2 · utility

20Cited by
4References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 27, 2004
Grant dateNov 28, 2006
Priority date
Expiry dateDec 2, 2024

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03F1/086
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

The invention provides an amplifier arrangement which is of multistage design. The output transistor in the output stage has a coupling path between its control input and its controlled path. The coupling path comprises a series circuit comprising a Miller compensation capacitance and a resistance with a controllable resistance value. It is thus possible to ensure stable operation of the amplifier regardless of bias and load conditions while simultaneously reducing the quiescent current drawn.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.