Expandable self-route multi-memory packet switch with a configurable multicast mechanism
US7142515B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2002 |
| Grant date | Nov 28, 2006 |
| Priority date | — |
| Expiry date | Sep 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/505
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Data transmission system comprising a plurality of Local Area Networks (LANs) (10-1 to 10-4) interconnected by a hub (12) including the same plurality of LAN adapters (16-1 to 16-4) respectively connected to the LANs and a packet switch (14) comprising at least a packet switch module interconnecting all LAN adapters wherein a packet transmitted by any adapter to the packet switch includes a header containing at least the address of the adapter to which the packet is forwarded. The system comprises a memory block at each crosspoint of the switch module including memory control means for determining from the header of the received data packet whether the packet is to be forwarded to the output port associated with the crosspoint and a data memory unit for storing at least the data packet into the data memory unit before sending it to the output port. The memory control means analyzes all the bytes following the header when it includes a specific configuration indicating that the packet is a multicast address packet preceding a multicast frame in order to determine whether the packets of the multicast frame are to be forwarded to the output port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.